Delay/Phase Regeneration Circuit

  1. Lookup NU author(s)
  2. Crescenco D'Alessandro
  3. Dr Andrey Mokhov
  4. Dr Alex Bystrov
  5. Professor Alex Yakovlev
Author(s)D'Alessandro C, Mokhov A, Bystrov A, Yakovlev A
Editor(s)
Publication type Conference Proceedings (inc. Abstract)
Conference Name13th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC
Conference LocationBerkeley, California
Year of Conference2007
Date12-14 March 2007
Volume
Pages105-114
ISBN076952771X
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Designs which require a phase relationship between two signals to be maintained along a link benefit from the use of repeaters which actively regenerate this relationship. This paper discusses some implementations of phase-regeneration circuits and attempts to introduce the reader to the issues encountered in the design of such circuitry. The paper proposes various design solutions for the dual-rail case, extending the work to the multiple-rail case. A novel device which is able to reconstruct a sequence of events is also presented, the transition sequence encoder. Simulation results are provided with discussion on the relative performance.
PublisherIEEE
URLhttp://dx.doi.org/10.1109/ASYNC.2007.14
DOI10.1109/ASYNC.2007.14
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