Impact of Ge content on the gate oxide reliability of strained-Si/SiGe MOS devices

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  2. Dr Suresh Uppal
  3. Dr Mehdi Kanoun
  4. John Varzgar
  5. Dr Sanatan Chattopadhyay
  6. Dr Sarah Olsen
  7. Professor Anthony O'Neill
Author(s)Uppal S, Kanoun M, Varzgar JB, Chattopadhyay S, Olsen SH, O'Neill AG
Publication type Article
JournalMaterial Science and Engineering B
ISSN (electronic)1873-4944
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In this paper we study the impact of the variation of Ge content on the gate oxide reliability of strained-Si/SiGe (s-Si/SiGe) MOS devices. MOS capacitors and n-MOSFET devices were fabricated on Si, and strained Si grown on SiGe virtual substrates with a Ge content of 10 and 30%. The devices had poly-Si gates and were fabricated using thermal oxidation at 800 °C giving average oxide thickness of 6.8 nm. Constant voltage stressing (CVS) at 7 V was used to study the breakdown characteristics of different samples. We observe a distinguishably different breakdown phenomenon for Si and s-Si/SiGe samples. Whereas the oxide on Si shows a typical breakdown behavior of a thick oxide, the oxide on s-Si/SiGe samples showed a quasi- or soft breakdown with an abrupt increase in gate leakage which increases after further stressing. The time to breakdown decreased with increase in the Ge content. These behaviors are attributed to poorer quality of the oxide on s-Si/SiGe caused by the high surface roughness, interface and oxide charges. It is pointed that quasi-breakdown may be a stronger reliability limiting factor for s-Si/SiGe devices in the oxide thickness range studied.
PublisherElsevier SA
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