Security Evaluation of Balanced 1-of-n Circuits

  1. Lookup NU author(s)
  2. Dr Frank Burns
  3. Dr Alex Bystrov
  4. Dr Albert Koelmans
  5. Professor Alex Yakovlev
Author(s)Burns F, Bystrov A, Koelmans A, Yakovlev A
Publication type Article
JournalIEEE Transactions on VLSI Systems
Year2011
Volume19
Issue11
Pages2135-2139
ISSN (print)1063-8210
ISSN (electronic)1557-9999
Full text for this publication is not currently held within this repository. Alternative links are provided below where available.
This paper describes a novel design-flow for securebalanced circuits and a new security metric. Cryptographiccircuit specifications are refined and passed to optimizationand mapping tools for mapping to a library of power-balancedcomponents. Logic optimization tools are then applied to generatesecure synchronous circuits for layout generation. The libraryconsists of novel mixed 1-of-2 and 1-of-4 components based onN-nary logic. This paper presents a technique for evaluating thesecurity of such circuits. A security metric is introduced whichis based on the common selection function that is widely used inDPA attacks. This is used to compare the security level for thedifferent kinds of circuits generated. The paper highlights whichcircuits are more secure and demonstrates a trade-off betweenefficiency and security.
PublisherIEEE
URLhttp://dx.doi.org/10.1109/TVLSI.2010.2064793
DOI10.1109/TVLSI.2010.2064793
Actions    Link to this publication