On Dual-Rail Control Logic for Enhanced Circuit Robustness

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  2. Dr Andrey Mokhov
  3. Dr Victor Khomenko
  4. Dr Danil Sokolov
  5. Professor Alex Yakovlev
Author(s)Mokhov A, Khomenko V, Sokolov D, Yakovlev A
Publication type Report
Series TitleSchool of Electrical, Electronic & Computer Engineering Technical Report Series
Year2010
Legacy DateNovember 2010
Report NumberNCL-EECE-MSD-TR-2010-162
Pages16
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Ultra low-power design and energy harvesting applications require digital systems to operate under extremely low voltages approaching the point of balance between dynamic and static power consumption which is attained in the sub-threshold operation mode. Delay variations are extremely large in this mode, which calls for the use of asynchronous circuits that are speed-independent or quasi-delay-insensitive. However, even these classes of asynchronous logic become vulnerable because certain timing assumptions commonly accepted under normal operating conditions are no longer valid. In particular, the delay of inverters, often used as the so-called input `bubbles', can no longer be neglected and they have to be either removed or properly acknowledged to ensure speed-independence. This paper presents an automated approach to synthesis of robust controllers for sub-threshold digital systems based on dual-rail implementation of control logic which eliminates inverters completely. This and other important properties are analysed and compared to the standard single-rail solutions. Dual-rail controllers are shown not to have signicant overheads in terms of area and power consumption and are even faster in some cases due to the elimination of inverters from critical paths. The presented automated techniques are very e-cient and can be applied to very large controllers as demonstrated in benchmarks.
InstitutionSchool of Electrical, Electronic & Computer Engineering, Newcastle University
Place PublishedNewcastle upon Tyne
URLhttp://async.org.uk/tech-reports/NCL-EECE-MSD-TR-2010-162.pdf
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