A design methodology for maximizing the voltage gain of strained Si MOSFETs using the thickness of the silicon-germanium strain relaxed buffer as a design parameter

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  2. Layi Alatise
  3. Dr Kelvin Kwa
  4. Dr Sarah Olsen
  5. Professor Anthony O'Neill
Author(s)Alatise O, Kwa K, Olsen S, O'Neill A
Editor(s)
Publication type Conference Proceedings (inc. Abstract)
Conference NameInternational Semiconductor Device Research Symposium (ISDRS)
Conference LocationCollege Park, Maryland, USA
Year of Conference2009
Date9-11 December 2009
Volume
Pages-
ISBN9781424460304
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URLhttp://dx.doi.org/10.1109/ISDRS.2009.5378304
DOI10.1109/ISDRS.2009.5378304
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