Metastability in Asynchronous Wait-Free Protocols

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  2. Dr Stephen Paynter
  3. Neil Henderson
  4. Dr James Armstrong
Author(s)Paynter S, Henderson N, Armstrong JM
Publication type Article
JournalIEEE Transactions on Computers
ISSN (print)0018-9340
ISSN (electronic)1557-9956
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Metastability can undermine the correctness of protocols which are demonstrably correct when metastability is ignored, e.g. when shared bits are assumed to be L(amport)-safe registers. We establish this using the CSP process algebra and the FDR2 model-checker, which we use to investigate the impact of various models of shared bits on different wait-free protocols, including Lamport's regular register, Simpson's 4-slot ACM; Kirousis et. al's ACM; Tromp's Atomic Bit and 4-Track ACMs; and Haldar and Subramanian's ACM. On the one hand, these ACMs exhibit different failure modes when metastability effects defeat hardware design measures to contain them. In this case the commonly used L-safe bit abstraction might rule out possible failure behaviours. On the other hand, most of these ACMs function correctly when metastability is resolved between instructions. In this case the L-safe abstraction permits failure behaviours which would not actually occur. Consequently, impossibility results concerning ACMs which are based on L-safe bit models may be pessimistic. We demonstrate this by showing that Simpson's 4-slot ACM functions correctly when constraints associated with metastability containment hold.
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