A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits

  1. Lookup NU author(s)
  2. Dr Delong Shang
  3. Dr Frank Burns
  4. Dr Alex Bystrov
  5. Dr Albert Koelmans
  6. Dr Danil Sokolov
  7. Professor Alex Yakovlev
Author(s)Shang D, Burns F, Bystrov A, Koelmans A, Sokolov D, Yakovlev A
Editor(s)
Publication type Conference Proceedings (inc. Abstract)
Conference Name14th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2004)
Conference LocationSantorini, Greece
Year of Conference2004
Date2004
Volume3254
Pages471-480
Series TitleLecture Notes in Computer Science
03029743
ISBN9783540230953
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PublisherSpringer
URLhttp://dx.doi.org/10.1007/b100662
DOI10.1007/b100662
NotesSession 9: Security and Safety
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