Optimisation of a 4H-SiC enhancement mode power JFET for high temperature operation

  1. Lookup NU author(s)
  2. Praneet Bhatnagar
  3. Dr Alton Horsfall
  4. Professor Nick Wright
  5. Dr Christopher Johnson
  6. Dr Konstantin Vasilevskiy
  7. Professor Anthony O'Neill
Author(s)Bhatnagar P, Horsfall AB, Wright NG, Johnson CM, Vassilevski KV, O'Neill AG
Publication type Article
JournalSolid-State Electronics
Year2005
Volume49
Issue3
Pages453-458
ISSN (print)0038-1101
ISSN (electronic)1879-2405
Full text for this publication is not currently held within this repository. Alternative links are provided below where available.
PublisherPergamon
URLhttp://dx.doi.org/10.1016/j.sse.2004.12.002
DOI10.1016/j.sse.2004.12.002
Actions    Link to this publication
Share