SiGe HMOSFET differential pair

  1. Lookup NU author(s)
  2. Stephen Badcock
  3. Professor Anthony O'Neill
Author(s)Badcock SG; O'Neill AG; Michelakis K; Despotopoulos S; Papavassiliou C; Toumazou C
Editor(s)
Publication type Conference Proceedings (inc. Abstract)
Conference NameIEEE International Symposium on Circuits and Systems
Conference LocationSydney, NSW, Australia
Year of Conference2001
Legacy Date6-9 May 2001
Volume
Pages679-682
ISBN0780366859
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A SiGe HMOSFET can be engineered to provide enhanced linearity in its output current-voltage characteristics. The additional linearity can he exploited in the design of more linear analogue circuits like the differential pair presented here. From the TCAD data of such a structure, the BSIM3v3 model of the transistor was extracted and simulation results were obtained for the performance of a differential pair. At the specified power of 1.25 mW the input range of the SiGe differential pair at which the percent nonlinearity is below 1%, is roughly twice that of its Si counterpart. Additionally the SiGe circuit is more power efficient since an increase of the power consumption from 1 mW to 1.25 mW accounts for an improvement of about 40% in its input range, as compared to only 10% for Si. (13 References).
PublisherIEEE
URLhttp://dx.doi.org/10.1109/ISCAS.2001.921947
DOI10.1109/ISCAS.2001.921947
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