Silicon Carbide Vertical JFET with Self-Aligned Nickel Silicide Contacts

Vassilevski, K; Nikitina, I; Horsfall, AB; Wright, NG; Smith, AJ; Johnson, CM

doi:10.4028/www.scientific.net/MSF.679-680.670

Silicon Carbide Vertical JFET with Self-Aligned Nickel Silicide Contacts

Lookup NU author(s): Dr Konstantin Vasilevskiy ORCiD, Irina Nikitina, Dr Alton Horsfall, Professor Nick Wright

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Abstract

Trenched implanted vertical JI.ETs (TI-VJFETs) with self-aligned gate and source contacts were fabricated on commercial 4H-SiC epitaxial wafers. Gate regions were formed by aluminium implantation through the same silicon oxide mask which was used for etching mesa-structures. Self-aligned nickel silicide source and gate contacts were formed using a silicon oxide spacer formed on mesa-structure sidewalls by anisotropic thermal oxidation of silicon carbide followed by anisotropic reactive ion etching of oxide. Fabricated normally-on 4H-SiC TI-VJFETs demonstrated low gate leakage currents and blocking voltages exceeding 200 V.