Lookup NU author(s): Dr Andrey Mokhov,
Dr Victor Khomenko,
Dr Danil Sokolov,
Professor Alex Yakovlev
Ultra low-power design and energy harvesting applications require digital systems to operate under extremely low voltages approaching the point of balance between dynamic and static power consumption which is attained in the sub-threshold operation mode. Delay variations are extremely large in this mode, which calls for the use of asynchronous circuits that are speed-independent or quasi-delay-insensitive. However, even these classes of asynchronous logic become vulnerable because certain timing assumptions commonly accepted under normal operating conditions are no longer valid. In particular, the delay of inverters, often used as the so-called input ‘bubbles’, can no longer be neglected and they have to be either removed or properly acknowledged to ensure speed-independence. This paper presents an automated approach to synthesis of robust controllers for sub-threshold digital systems based on dual-rail implementation of control logic which eliminates inverters completely. This and other important properties are analysed and compared to the standard single-rail solutions. Dual-rail controllers are shown not to have significant overheads in terms of area and power consumption and are even faster in some cases due to the elimination of inverters from critical paths. The presented automated synthesis techniques are very efficient and can be applied to very large controllers as demonstrated in benchmarks.
Author(s): Mokhov A, Khomenko V, Sokolov D, Yakovlev A
Editor(s): Brandt, J., Heljanko, K.
Publication type: Conference Proceedings (inc. Abstract)
Publication status: Published
Conference Name: 12th International Conference on Application of Concurrency to System Design (ACSD)
Year of Conference: 2012
Date deposited: 04/07/2012
Publisher: IEEE Computer Society
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