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Thermal Optimization in Network-on-Chip-Based 3D Chip Multiprocessors Using Dynamic Programming Networks

Lookup NU author(s): Nizar Dahir, Ra'ed Al-Dujaily, Dr Terrence Mak, Professor Alex Yakovlev

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Abstract

The substantial silicon density in 3D VLSI, albeit its numerous advantages, introduces serious thermal threats that would lead to faults and system failures. This article introduces a new strategy to effectively diffuse heat from NoC-based 3D CMPs. Runtime Dynamic Programming Network (DPN) is proposed to optimize routing directions and provide silicon temperature moderation. Both on-chip reliability and computational performance have been improved by 63% and 27%, respectively, with the DPN approach. This work enables a new avenue to explore the adaptability for future large-scale 3D integration.

Publication metadata

Author(s): Dahir N, Al-Dujaily R, Mak T, Yakovlev A

Publication type: Article

Publication status: Published

Journal: ACM Transactions on Embedded Computing Systems (TECS)

Year: 2014

Volume: 13

Issue: 4s

Print publication date: 01/07/2014

ISSN (print): 1539-9087

ISSN (electronic): 1558-3465

Publisher: Assocation for Computing Machinery, Inc.

URL: http://dx.doi.org/10.1145/2584668

DOI: 10.1145/2584668

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