Lookup NU author(s): Amit Tiwari,
Dr Alton Horsfall,
Professor Nick Wright
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Current limiting devices (CLD), which employ back-to-back connected high voltage normally-ON SIC-based vertical junction tiled effect transistors (VJFETs), are realized to protect the sensitive aircraft electronics from the adverse effects of a lightning strike to the airframe. The functionality of the packaged CLDs with high and low current levels is demonstrated in low voltage static and transient tests. Electro-thermal simulations are performed to optimize the thermal performance of CLDs for high-energy test environments.
Author(s): Tiwari AK, Horsfall AB, Wright NG, Clark DT, Young RA, Wallace P, Mills L, Turvey S
Publication type: Conference Proceedings (inc. Abstract)
Publication status: Published
Conference Name: 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)
Year of Conference: 2015
Print publication date: 01/01/2015
Online publication date: 01/10/2015
Acceptance date: 01/01/1900
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