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Energy Efficient Bootstrapped CMOS Inverter for Ultra-Low Power Applications

Lookup NU author(s): Mohammed Al-Daloo, Professor Alex Yakovlev, Dr Basel Halak

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Abstract

This paper describes an energy efficient boot- strapped CMOS inverter for ultra-low power applications. The proposed design is achieved by internally boosting the gate voltage of the transistors (via the charge pumping technique), and the operating region is shifted from the sub-threshold to a higher region, enhancing performance and improving tolerance to PVT variations. Despite the proposed bootstrapped driver operates with a sub-threshold power supply it uses fewer transistors engaging in this region by utilizing two stages. The first stage is a normal driver with PMOS and NMOS transistors that are driven by the enhancing voltage circuit (stage 2) which generates voltage levels theoretically between -VDD for pulling up to 2VDD for pulling down. Our analysis shows that the proposed implementation achieves around 20% reduction in energy consumption compared to conventional designs under a supply voltage of 0.15V VDD.


Publication metadata

Author(s): Al-Daloo M, Yakovlev A, Halak B

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: 23rd IEEE International Conference on Electronics Circuits and Systems

Year of Conference: 2016

Pages: 516-519

Print publication date: 12/12/2016

Online publication date: 12/12/2016

Acceptance date: 11/12/2016

Date deposited: 21/12/2016

Publisher: Institute of Electrical and Electronics Engineers

URL: https://doi.org/10.1109/ICECS.2016.7841252

DOI: 10.1109/ICECS.2016.7841252

Library holdings: Search Newcastle University Library for this item

ISBN: 9781509061136


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