Lookup NU author(s): Haider Alrudainy,
Dr Andrey Mokhov,
Dr Fei Xia,
Professor Alex Yakovlev
Full text for this publication is not currently held within this repository. Alternative links are provided below where available.
© 2017 IEEE. Asynchronous logic and power gating are promising techniques for low duty cycle applications which need maximal energy efficiency, which are becoming more common-place with the popularity of wireless and embedded systems. This paper investigates the potential use of Nano/Micro- Electro- Mechanical (N/MEM) switches as the means of power gating asynchronous computation. A systematic optimization of the N/MEMS parameters is performed using finite element analysis (FEA) in the multiphysics COMSOL tool. An asynchronous FIR filter with a 4-phase bundled-data handshake protocol is designed and implemented in the 90nm technology node. The N/MEMS switches are comparatively studied with conventional sleep transistors in a system where both the computation and the timing controls for the asynchronous FIR circuits are power gated appropriately. It is demonstrated that our N/MEMS solution offers a 69% energy improvement when 32-tap FIR filter is power gated at a data rate of 1KHz compared to a 39% savings realized by using sleep transistors in the same design.
Author(s): Alrudainy HM, Mokhov A, Xia F, Yakovlev A
Publication type: Conference Proceedings (inc. Abstract)
Publication status: Published
Conference Name: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Year of Conference: 2017
Online publication date: 24/07/2017
Acceptance date: 02/04/2016
Publisher: IEEE Computer Society
Library holdings: Search Newcastle University Library for this item