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Measurements of gate-oxide interface roughness in strained-Si virtual substrate SiGe/Si MOSFET device structures

Lookup NU author(s): Dr Sarah Olsen, Professor Anthony O'Neill

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Abstract

© 2003 IOP Publishing Ltd. A series of SiGe/Si virtual substrate based n-channel Si MOSFETs have been analysed using transmission electron microscopy (TEM). The focal point of this work is to investigate the effect of gate oxidation upon an undulating virtual substrate surface. We find that cross-sectional TEM images of devices processed on such a wafer show a significant difference in the amplitude of gate-oxide interface roughness at the sloping edges of substrate surface. Moreover, such nanoscale roughening correlates to the variable vicinal nature of the undulating SiGe substrate surface. Methods for quantitative measurement of the roughness are presented.


Publication metadata

Author(s): Norris DJ, Cullis AG, Olsen SH, O'Neill AG, Zhang J

Publication type: Book Chapter

Publication status: Published

Book Title: Microscopy of Semiconducting Materials 2003

Year: 2018

Pages: 389-392

Print publication date: 01/01/2003

Online publication date: 10/01/2018

Acceptance date: 01/01/1900

Edition: 1st

Publisher: CRC Press

Place Published: Boca Raton, FL, USA

URL: https://doi.org/10.1201/9781351074636

DOI: 10.1201/9781351074636

Library holdings: Search Newcastle University Library for this item

ISBN: 9781351083089


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