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An Excitation Time Model for General-purpose Memristance Tuning Circuit

Lookup NU author(s): Thomas Bunnam, Dr Danil Sokolov, Professor Alex Yakovlev

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Abstract

© 2018 IEEE. This paper presents a way to realize a simple yet accurate excitation time model of memristor-based circuits that are in the form of voltage dividers. According to the supported circuit structure, this model is compatible with a wide range of memristor applications, such as delay elements and analog memories. Memristance tuning based on excitation time estimation, i.e. pulse width, instead of using comparators, helps to save area and power. A general-purpose memristance tuning (GMET) circuit is proposed in order to demonstrate the simplicity of the proposed model and to evaluate its accuracy. Our model estimates are compared against the simulation results for the GMET circuit with VTEAM model of the memristor. The results show that the whole-range memristance shifts can be estimated with the worst case average error of 5.49%. They also show the worst case maximum error of 13.25%, which reduces to less than 7% when the operated memristance is higher than 2.5kΩ.


Publication metadata

Author(s): Bunnam T, Soltan A, Sokolov D, Yakovlev A

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: 2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Year of Conference: 2018

Pages: Epub ahead of print

Online publication date: 04/05/2018

Acceptance date: 02/04/2018

ISSN: 2379-447X

Publisher: IEEE

URL: https://doi.org/10.1109/ISCAS.2018.8351151

DOI: 10.1109/ISCAS.2018.8351151

Library holdings: Search Newcastle University Library for this item

ISBN: 9781538648810


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