Lookup NU author(s): Professor Alex Yakovlev
The design of an asynchronous communication system using partially automated techniques is described in this paper. The protocol is formally specified as a protocol state machine and verified with respect to deadlock-freedom and delay-insensitivity using Petri net based model-checking tools. A protocol controller has been synthesized by direct mapping of the Petri net model derived from the protocol specification. The logic implementation was analysed using the Cadence toolkit. While most of the controller's logic is robust to arbitrary gate delay variations, a number of speed-up strategies based on relative timing have been considered. The results of SPICE simulation show the advantages of the direct mapping method compared to logic synthesis. Overall, the design process suggested here offers a generic way to constructing asynchronous communication systems, for both on-chip and off-chip interconnects.
Author(s): Yakovlev A
Publication type: Report
Publication status: Published
Report Number: CS-TR-761
Institution: School of Computing Science
Place Published: University of Newcastle upon Tyne