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Asynchronous system synthesis based on direct mapping using VHDL and Petri nets

Lookup NU author(s): Dr Delong Shang, Dr Frank Burns, Dr Albert Koelmans, Professor Alex Yakovlev, Dr Fei Xia

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Abstract

A technique is proposed to synthesise system behavioural specifications written in VHDL into speed-independent asynchronous circuits constructed using David cells. This technique combines the advantages of logic synthesis and syntax-directed translation techniques. Coloured Petri nets and labelled Petri nets are used as intermediate formats for datapath and control representation. Speed-independent asynchronous circuits are obtained from these nets via direct translation. Several examples demonstrate the viability of the technique, which produces superior results compared with other ones.


Publication metadata

Author(s): Shang D, Burns F, Koelmans A, Yakovlev A, Xia F

Publication type: Article

Publication status: Published

Journal: IEE Proceedings - Computers and Digital Techniques

Year: 2004

Volume: 151

Issue: 3

Pages: 209-220

Print publication date: 01/05/2004

ISSN (print): 1350-2387

ISSN (electronic):

Publisher: The Institution of Engineering and Technology

URL: http://dx.doi.org/10.1049/ip-cdt:20040525

DOI: 10.1049/ip-cdt:20040525


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