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A robust synchronizer

Lookup NU author(s): Jun Zhou, Professor David Kinniment, Dr Gordon Russell, Professor Alex Yakovlev

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Abstract

We describe a new latch circuit designed to give a high performance in low voltage synchronizer applications. By increasing the latch current only during metastability, we can more than maintain the value of the metastability time constant, τ, without significantly increasing the power. Our circuit also reduces the variation of τ with Vdd and temperature, so that it has a lower τ at 50% Vdd than the conventional jamb latch has at 60% Vdd. © 2006 IEEE.


Publication metadata

Author(s): Zhou J, Kinniment D, Russell G, Yakovlev A

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: Annual Symposium on Emerging VLSI Technologies and Architectures

Year of Conference: 2006

Pages: 442-443

Date deposited: 24/08/2010

Publisher: IEEE

URL: http://dx.doi.org/10.1109/ISVLSI.2006.12

DOI: 10.1109/ISVLSI.2006.12

Library holdings: Search Newcastle University Library for this item

ISBN: 0769525334


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