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Fast modulo 2n - (2n - 2 + 1) addition: A new class of adder for RNS

Lookup NU author(s): Professor Said Boussakta

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Abstract

Efficient modular adder architectures are invaluable to the design of residue number system (RNS)-based digital systems. For example, they are used to perform residue encoding and decoding, modular multiplication, and scaling. This work is a first in the literature on modulo 2n - (2n - 2 + 1) addition. The algebraic properties of such moduli are exploited in the derivation of the proposed fast adder architecture. Actual VLSI implementations using 130nm CMOS technology show that our adder significantly outperforms the most competitive generic modular adder design over the entirety of the power-delay-area space. © 2007 IEEE.

Publication metadata

Author(s): Patel RA, Benaissa M, Boussakta S

Publication type: Article

Publication status: Published

Journal: IEEE Transactions on Computers

Year: 2007

Volume: 56

Issue: 4

Pages: 572-576

Print publication date: 01/04/2007

Date deposited: 08/06/2010

ISSN (print): 0018-9340

ISSN (electronic): 1557-9956

Publisher: IEEE

URL: http://dx.doi.org/10.1109/TC.2007.1001

DOI: 10.1109/TC.2007.1001

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