Lookup NU author(s): Dr Frank Burns,
Dr Julian Murphy,
Dr Delong Shang,
Dr Albert Koelmans,
Professor Alex Yakovlev
Full text for this publication is not currently held within this repository. Alternative links are provided below where available.
A dynamic global security-aware synthesis flow using the SystemC language is presented. SystemC security models are first specified at the system or behavioural level using a library of SystemC behavioural descriptions which provide for the reuse and extension of security modules. At the core of the system is incorporated a global security-aware scheduling algorithm which allows for scheduling to a mixture of components of varying security level. The output from the scheduler is translated into annotated nets which are subsequently passed to allocation, optimisation and mapping tools for mapping into circuits. The synthesised circuits incorporate asynchronous secure power-balanced and fault-protected components. Results show that the approach offers robust implementations and efficient security/area trade-offs leading to significant improvements in turnover. © The Institution of Engineering and Technology 2007.
Author(s): Burns F, Murphy J, Shang D, Koelmans A, Yakorlev A
Publication type: Article
Publication status: Published
Journal: IET Computers and Digital Techniques
Print publication date: 01/01/2007
ISSN (print): 1751-8601
ISSN (electronic): 1751-861X
Publisher: Institution of Engineering and Technology
Altmetrics provided by Altmetric