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Low latency synchronization through speculation

Lookup NU author(s): Professor David Kinniment, Professor Alex Yakovlev

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Abstract

Synchronization between independently clocked regions in a high performance system is often subject to latencies of more than one clock cycle. We show how the latency can be reduced significantly, typically to half the number of clock cycles required for high reliability, by speculating that a long synchronization time is not required. The small number of synchronization metastability times longer than normal ae detected, and subsequent computations re-evaluated, thus maintaining the reliability of the system.


Publication metadata

Author(s): Kinniment DJ, Yakovlev A

Editor(s): Macii, E., Paliouras, V., Koufopavlou, O.

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation; 14th International Workshop (PATMOS)

Year of Conference: 2004

Pages: 278-288

ISSN: 0302-9743 (print) 1611-3349 (online)

Publisher: Springer

URL: http://dx.doi.org/10.1007/978-3-540-30205-6_30

DOI: 10.1007/978-3-540-30205-6_30

Library holdings: Search Newcastle University Library for this item

Series Title: Lecture Notes in Computer Science

ISBN: 9783540230953


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