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Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design

Lookup NU author(s): Agnes Madalinski, Dr Alex Bystrov, Dr Victor Khomenko, Professor Alex Yakovlev

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Abstract

Synthesis of asynchronous circuits from signal transition graphs (STGs) involves resolution of state encoding conflicts by means of refining the STG specification. The refinement process is generally done automatically using heuristics. It often produces suboptimal solutions or sometimes fails to solve the problem. Thus manual intervention by the designer may be required. A framework is presented for an interactive refinement process aimed to help the designer. It is based on the visualisation of conflict cores, i.e. sets of transitions causing encoding conflicts, which are represented at the level of finite and complete prefixes of STG unfoldings.


Publication metadata

Author(s): Madalinski A, Bystrov A, Khomenko V, Yakovlev A

Publication type: Article

Journal: IET Computers & Digital Techniques

Year: 2003

Volume: 150

Issue: 5

Pages: 285-293

ISSN (print): 1751-8601

ISSN (electronic): 1751-861X

Publisher: IEE

URL: http://dx.doi.org/10.1049/ip-cdt:20030831

DOI: 10.1049/ip-cdt:20030831

Notes: Special Issue on Best Papers from DATE'2003


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